Chinese researchers led by the Institute of Metal Research (CAS) have built the world’s first vertically structured two‑device transistor that passes real‑world RF testing – a silicon‑graphene‑germanium barrier transistor with a measured intrinsic cutoff frequency of 132 GHz and a theoretical ceiling of 1 THz. This opens a separate path for 6G terahertz RF chips, entirely independent of high‑end lithography.

The old limit: Conventional planar CMOS and GaAs transistors rely on lateral electron drift. As frequencies push past 100GHz (Sub‑THz and THz bands), electron transit time becomes the bottleneck. Shrinking feature size with EUV also lowers breakdown voltage – a fatal trade‑off for RF power amplifiers.

The new approach: Instead of lateral scaling, the team uses single‑layer graphene (0.34nm thick) as the base region, sandwiched between silicon and germanium layers. Electron transport happens vertically through the graphene – controlled by Schottky barriers at material interfaces. Device performance now depends on epitaxial film quality, not lithography precision.

Key advantage: MBE and CVD tools for vertical stacking are far cheaper and more accessible than EUV scanners, and domestic equipment availability sidesteps foreign export controls. While CPUs/GPUs still need EUV for massive transistor counts, 6G RF amplifiers and mm‑wave radar chips require only small transistor counts – making this vertical design a natural fit.

This breakthrough does not replace EUV for digital logic, but it redefines the RF chip roadmap – a lateral‑to‑vertical shift that bypasses the physical ceiling of planar scaling and the political ceiling of lithography bans.

ICgoodFind Take:
132GHz is just the beginning. This is a genuine architecture‑level bypass – not a better planar transistor, but a completely different stack. For procurement, this signals new supply sources for 6G front‑end components that won't depend on TSMC/Samsung EUV capacity. Watch the epitaxial materials supply chain next.